Computer Science Department
School of Computer Science, Carnegie Mellon University


Register Allocation Aware Instruction Selection

David Ryan Koes

October 2009


Keywords: Compilers, register allocation, instruction selection, backend optimization

In existing optimization frameworks, compiler passes are not tightly integrated and often work at cross purposes. In this report we describe an integration framework for the key backend compiler optimizations of register allocation and instruction selection: Register Allocation Aware Instruction Selection (RA2ISE). We discover that the fundamental building block of the RA2ISE framework, register allocation aware tiles (RAATs), introduce significant complexity into the network flow model of register allocation. It is unlikely that efficient and effective solution techniques exist when RAATs are incorporated into the model. We also explore the merits of another component of the RA2ISE framework, feedback driven instruction selection and find that the expected benefits are far outweighed by the necessary costs.

18 pages

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