CMU-CS-03-126
Computer Science Department
School of Computer Science, Carnegie Mellon University



CMU-CS-03-126

Behavioral Consistency of C and Verilog Programs

Edmund Clarke, Daniel Kroening, Karen Yorav

May 2003

CMU-CS-03-126.ps
CMU-CS-03-126.pdf


Keywords: Hardware verification, ANSI-C, Bounded Model Checking


We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program are unwound and translated into a formula that is satisfiable if and only if the circuit and the code disagree. The formula is then checked using a SAT solver. We are able to translate C programs that make use of side effects, pointers, dynamic memory allocation, and loops with conditions that cannot be evaluated statically. We describe experimental results on various reactive circuits and programs, including a small processor given in Verilog and its Instruction Set Architecture given in ANSI-C.

34 pages


Return to: SCS Technical Report Collection
School of Computer Science homepage

This page maintained by reports@cs.cmu.edu